Optimized transconductance designs to enhance the linearity performance of RF front-end receiver circuits in 130 NM CMOS technology / Nandini Vitee

Nandini , Vitee (2020) Optimized transconductance designs to enhance the linearity performance of RF front-end receiver circuits in 130 NM CMOS technology / Nandini Vitee. PhD thesis, Universiti Malaya.

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      Highly linear front-end circuits are greatly desired for wireless receivers to improve the dynamic range. However, intermodulation distortions caused by the non-linear transconductor current limits the linearity of the front-end receiver circuit in CMOS technologies. In addition to the inherent nonlinear effect, the downscaling of CMOS further exacerbates the linearity of the circuit due to lower voltage headroom and high-field mobility. Thus, it is essential to develop effective circuit techniques that can aid linearity enhancement without jeopardizing other preferred performances such as low noise, high conversion gain, and low-power consumption. In this thesis, two different high linear transconductors are presented which are designed and fabricated in 130 nm CMOS technology. The first circuit is a low-voltage high linearity differential-folded mixer with multiple-feedback techniques for performance enhancement. The capacitor cross-coupled (CCC) common-gate transconductance stage is implemented to improve the noise figure (NF) at low power by boosting the effective transconductance while enhancing the linearity via suppressing the 2nd-order harmonic distortion. However, the created loop gain of the CCC can raise the 3rd-order intermodulation (IM3) distortion, penalizing the input referred 3rd-order intercept point (IIP3) performance. Therefore, a positive and a 2nd capacitive feedback are implemented into the CCC common-gate transconductor, not only to suppress the IM3 distortion current, but also to add design flexibility to the input transistors. Furthermore, the positive feedback also improves the input impedance matching, conversion gain and NF through a flexible design criterion. The proposed mixer operating at 900 MHz dissipates 4 mW at 1.0 V. The measured NF is 8.5 dB, the conversion gain is 18.4 dB and the IIP3 is +12.5 dBm. The second circuit is a high conversion gain and high linearity inductively source degenerated balun-low noise amplifier (LNA)-mixer with integrated transformer-based gate inductor and 2nd-order intermodulation (IM2) injection technique. In this work, two linearization techniques are proposed to improve the IIP3 of the balun-LNA-mixer. The intrinsic IM3 product of the inductively source degenerated (ISD) transconductor from the 2nd-order derivative transconductance component ( ) is reduced by tailoring towards optimum biasing point at moderate-inversion region. While, the generated IM3 current by the 1st-order derivative transconductance ( ) due to the interaction with the feedback component in the ISD transconductor is attenuated by 2nd harmonic injection via the bulk of the ISD transconductor. Further, a transformer-based gate inductor and a transformer-based balun are applied to improve the input impedance matching and produce a balanced differential input signal. Measured results show a high IIP3 of +16 dBm and a conversion gain of 22 dB at 2.4 GHz. The double sideband (DSB) NFDSB is 7.2 dB and the power consumption is 3.15 mW at 1.2 V. m g m g 

      Item Type: Thesis (PhD)
      Additional Information: Thesis (PhD) - Faculty of Engineering, Universiti Malaya, 2020.
      Uncontrolled Keywords: CMOS; High linearity; IM3 cancellation; Front-end receiver; Wireless receivers
      Subjects: T Technology > TK Electrical engineering. Electronics Nuclear engineering
      Divisions: Faculty of Engineering
      Depositing User: Mr Mohd Safri Tahir
      Date Deposited: 29 Nov 2021 04:50
      Last Modified: 17 Jan 2023 05:59
      URI: http://studentsrepo.um.edu.my/id/eprint/12538

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