Pedram , Tabatabaeemoshiri (2025) Defects identification on semiconductor wafer for yield improvement using machine learning / Pedram Tabatabaeemoshiri. Masters thesis, Universiti Malaya.
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Abstract
The semiconductor industry underpins modern technology, with its products embedded in almost every electronic device. As semiconductor devices grow increasingly intricate, ensuring their quality and reliability becomes more challenging. Electrical testing is crucial to semiconductor wafer quality assurance, designed primarily to identify fabrication defects. However, the testing process itself can inadvertently introduce new defects that may go undetected by subsequent inspection methods such as manual and visual inspection. When these defects escape detection, defective wafers may reach customers, leading to rejection and return to the manufacturer, resulting in significant yield losses and operational inefficiencies. This study addresses the urgent issue of detecting hidden defects in semiconductor wafers that conventional methods overlook. This work presents a novel graph-based semi-supervised learning (GSSL) algorithm designed for wafer defect detection. The proposed methodology involves collecting wafer inspection data, extracting relevant features, and applying the GSSL algorithm to identify the hidden defects. The approach constructs a graph representation of the wafer, leveraging its physical layout and test configuration, and integrates domain-specific knowledge. The method uses weighted edges to represent the likelihood of defect propagation between dies, optimized through extensive experimentation, followed by an iterative label propagation process to uncover hidden defects. Experimental results demonstrate the effectiveness of our method, achieving a 68% accuracy in detecting hidden defects across multiple product categories in real-world semiconductor manufacturing environments. The algorithm showed consistent performance across different wafer types and test configurations, outperforming traditional detection methods with improved computational efficiency. This study offers valuable insights into the semiconductor industry, providing an advanced tool to enhance yield management and quality control processes.
| Item Type: | Thesis (Masters) | 
|---|---|
| Additional Information: | Dissertation (M.A) – Faculty of Engineering, Universiti Malaya, 2025. | 
| Uncontrolled Keywords: | Semiconductor; Wafer testing; Defect identification; Test-induced defects; Graph-based semi-supervised learning | 
| Subjects: | T Technology > TK Electrical engineering. Electronics Nuclear engineering | 
| Divisions: | Faculty of Engineering | 
| Depositing User: | Mr Mohd Safri Tahir | 
| Date Deposited: | 23 Oct 2025 13:41 | 
| Last Modified: | 23 Oct 2025 13:41 | 
| URI: | http://studentsrepo.um.edu.my/id/eprint/16000 | 
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