Development of holmium oxide thin film as high-K gate dielectric based on silicon carbide substrate / Odesanya Kazeem Olabisi

Odesanya Kazeem , Olabisi (2022) Development of holmium oxide thin film as high-K gate dielectric based on silicon carbide substrate / Odesanya Kazeem Olabisi. PhD thesis, Universiti Malaya.

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Abstract

This thesis investigates the formation of holmium oxide (Ho2O3) thin film on silicon carbide (SiC) substrate by sputtering and thermal oxidation. The effects of thermal oxidation on the physical, chemical and electrical features of the resulting Ho2O3 layers were evaluated experimentally at various temperatures from (800 – 1100 °C). The crystallinity of the Ho2O3 films was detected by X-ray diffraction (XRD), while Fourier transform infrared (FTIR), High-Resolution Transmission electron microscopy (HRTEM), and X-ray photoelectron spectroscopy (XPS) analysis were used to investigate the chemical working atoms, atomic structures, and the elemental composition of the samples, respectively. The results of electrical characterization showed that thermally oxidized samples at 900 °C have the best electrical properties, which could be attributed to the thinnest oxide and absence of interfacial layer that was recorded at that temperature. For the oxynitridated samples, the impact of flow concentration of oxynitridation gas on the structural and electrical performance of the high-κ Ho2O3 dielectric on the SiC substrate was studied. The Ho2O3 films were grown using the PVD RF magnetron sputtering at various O2 and N2 gas flow concentrations from (25 – 100 %), and at a constant temperature and period of 900 °C and 15 mins, respectively. The results of FTIR and XRD analysis showed that cubic c-Ho2O3 and monoclinic-(b) SiO2 crystal structures were formed in between the SiC substrate and the Ho2O3 thin films during thermal oxynitridation. The microstrain and crystallite size were obtained by Williamson-Hall (W-H) plot. The electrical measurements from the MOS capacitor revealed that 50 % oxynitridation exhibited the most encouraging electrical results, with the smallest leakage current density of 6.05 × 10-2 A/cm2 at a breakdown field of 7.52 MV/cm and barrier height value of 18.5 eV. These results provide potential and important implications for using Ho2O3/SiC gate stack, validating the usefulness of leakage current density–breakdown electric field measurement in understanding the operation of the gate dielectric in MOS-based devices. Owing to variation in temperature during thermal applications, the thin film layers and substrates in complementary metal oxide semiconductor (CMOS) structures undergo high thermal stresses, which can result in large deformation and failure. Consequently, thermal characterization and stress analysis are necessary for the reliability and durability of the electronic structures. Furthermore, the distribution of heat and thermal stress between the Ho2O3 thin film and the SiC substrate was simulated numerically using finite element modelling and analysis software (ANSYS). This is necessary to emulate the thermal behaviour of the structure under different thermal loadings, and for each temperature loading, the effects of thermal stress and deformation on the structure were also investigated. Based on the results of the simulation, an optimum temperature was suggested. The thermal stability and characteristics of the thin film layer/SiC structure were evaluated and validated for better electrical performance.

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