Design of capacitive sensor interfacing circuit using 0.18 μm complementary metal oxide semiconductor technology / Fatemeh Banitorfian Hoveizavi

Hoveizavi, Fatemeh Banitorfian (2011) Design of capacitive sensor interfacing circuit using 0.18 μm complementary metal oxide semiconductor technology / Fatemeh Banitorfian Hoveizavi. Masters thesis, University of Malaya.

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    In recent years, sensors are becoming ubiquitous in several fields such as automotive industry, consumer electronics and medical equipment. The function of the sensor is to convert energy from other energy domain like (magnetic, chemical, thermal, mechanical or optical) into the electrical domain. One of the important sensors is the capacitive sensor. The aim of this project is to show the advantages of this circuit while it is applied in the RF MEMS switches, which have wireless applications such as antennas, filters, and phase shifters, and so on. In this project, the circuits are designed using 0.18μm Silterra CMOS technology and simulated in Mentor Graphic DA‒IC. The proposed capacitive sensor includes two major building blocks. One of them is a wide‒swing current mirror with enhanced output impedance. The second part of the circuit is an operational transconductance amplifier (OTA). The proposed OTA in this project is a two‒stage telescopic OTA that compared to the other types of OTA, it has higher gain, highest output swing and lower noise which are suitable for our target. It has been concluded that, our proposed project will be compared with some other capacitive MEMS sensor interface circuits which are presented in other papers. The recent works use different solutions to measure the capacitance sensor. Some works covers large enough capacitance range but inaccurate results and some other works give a precise result but in a limited range. A similar work used a 0.8-um CMOS technology with a 5-volt power supply. Also it uses a simple inaccurate current source. In this project, a more accurate current source configuration was selected and designed. Also, an 78dB-gain 6mW OTA was designed and optimized. The interface circuit is a combination of current source feeding the MEMS measure capacitor and CMOS reference capacitor, and an OTA which boost the measure signal to a suitable level for reading. Also, this project covers a capacitive range of 1000 fF which is more extensive than similar works.The design benefits a 0.18-um CMOS technology, which leads to a smaller chip size than similar works.

    Item Type: Thesis (Masters)
    Additional Information: Dissertation (M.Eng.) -– Faculty of Engineering, University of Malaya, 2011
    Uncontrolled Keywords: Detectors--Design and construction; Detectors--Materials; Detectors--Testing
    Subjects: T Technology > TA Engineering (General). Civil engineering (General)
    T Technology > TK Electrical engineering. Electronics Nuclear engineering
    Divisions: Faculty of Engineering
    Depositing User: Mrs Nur Aqilah Paing
    Date Deposited: 04 Aug 2015 15:45
    Last Modified: 04 Aug 2015 15:45

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