A VHDL implementation of bist technique in UART design / Muhd. Yamani Idna Idris

Muhd. Yamani, Idna Idris (2002) A VHDL implementation of bist technique in UART design / Muhd. Yamani Idna Idris. Undergraduates thesis, University of Malaya.

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    Item Type: Thesis ( Undergraduates)
    Additional Information: Academic Exercise (Bachelor’s Degree) – Faculty of Computer Science & Information Technology, University of Malaya, 2002.
    Uncontrolled Keywords: VHDL implementation; Bist technique; UART design
    Subjects: Q Science > QA Mathematics > QA75 Electronic computers. Computer science
    T Technology > T Technology (General)
    Divisions: Faculty of Computer Science & Information Technology
    Depositing User: Mr Mahadie Ab Latif
    Date Deposited: 01 Mar 2020 04:00
    Last Modified: 01 Mar 2020 04:00
    URI: http://studentsrepo.um.edu.my/id/eprint/10340

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