Ultra low power CMOS rectifier design for radio frequency energy harvesting systems using self-body-biasing techniques / Amin Khalili Moghaddam

Amin Khalili, Moghaddam (2017) Ultra low power CMOS rectifier design for radio frequency energy harvesting systems using self-body-biasing techniques / Amin Khalili Moghaddam. PhD thesis, University of Malaya.

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Abstract

The internet of things (IoT) technology has recently gone through a significant evolution and the obsession in this field is due to its ability to simultaneously connect and remotely control any physical objects. The IoT usually incorporates radio frequency identification (RFID) systems and other schemes which enable automated object identification in numerous applications such as environmental monitoring, object tracking, contact-less identification, and implantable medical device (IMD). Such systems commonly use wireless power transfer techniques for the purpose of operation. An integrated radio frequency energy harvesting (RFEH), which adopts a viable and efficient technique, is responsible for capturing sufficient power for the above-mentioned applications. The performance of the RFEH system relies on the performance of the integrated rectifier in order to operate with high efficiency. In this work, a symmetric differential-drive cross-coupled bridge (DDCCB) rectifier structure is proposed for far-field RFEH systems with the capability of capturing radio frequency (RF) signals and converting into a positive and a negative direct current (DC) voltage at the output. Four self-body-biasing techniques are proposed without requiring any additional or auxiliary circuits using local nodes in the structure. Only one of the proposed techniques illustrates a significant improvement in simulations which is referred to as lower dc feeding (LDCF) technique in this work. The proposed self-body-biasing technique has been implemented in a double-rail three-stage configuration with identical design parameters with the conventional self-body-biasing technique which is referred to as source-to-body (SB) biasing technique in this work. The SB and the LDCF rectifiers were fabricated in a standard 130 nm CMOS process and compared at the operation frequency of 500 MHz, 953 MHz and 2 GHz along with a corresponding load of 2 k, 10 k and 50 k. The LDCF technique allows the p-type transistors to operate with a dynamic threshold voltage (Vth) which improves the power conversion efficiency (PCE) when the rectifier is operating at a smaller received power. A 9.5% of maximum improvement is achieved at the peak PCE when the rectifier is operating at 953 MHz, and driving a 10 k load. A maximum PCE of 73.9% is measured at 2 GHz when the rectifier is driving a 2 k load. The LDCF technique also offers a self-limiting capability for its output voltage, by reducing the PCE at larger received power. A limiting voltage level of 3.5 V is measured irrespective to the operating frequency and load. This capability aids the protection of the subsequent circuits in a wireless sensor from being overpowered.

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